NXP Semiconductors /MIMXRT1064 /PXP /STAT_CLR

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Interpret as STAT_CLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IRQ)IRQ 0 (AXI_WRITE_ERROR)AXI_WRITE_ERROR 0 (AXI_READ_ERROR)AXI_READ_ERROR 0 (NEXT_IRQ)NEXT_IRQ 0AXI_ERROR_ID 0 (LUT_DMA_LOAD_DONE_IRQ)LUT_DMA_LOAD_DONE_IRQ 0RSVD20BLOCKY0BLOCKX

Description

Status Register

Fields

IRQ

Indicates current PXP interrupt status

AXI_WRITE_ERROR

Indicates PXP encountered an AXI write error and processing has been terminated.

AXI_READ_ERROR

Indicates PXP encountered an AXI read error and processing has been terminated.

NEXT_IRQ

Indicates that a command issued with the “Next Command” functionality has been issued and that a new command may be initiated with a write to the PXP_NEXT register

AXI_ERROR_ID

Indicates the AXI ID of the failing bus operation.

LUT_DMA_LOAD_DONE_IRQ

Indicates that the LUT DMA transfer has completed.

RSVD2

Reserved, always set to zero.

BLOCKY

Indicates the X coordinate of the block currently being rendered.

BLOCKX

Indicates the X coordinate of the block currently being rendered.

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